11. Branch instructions held a 15 bit offset, allowing access to all memory on the initial range.12. In particular, branch instructions could have used the ALU to compute the target address of the branch. 13. Instead, Branch instructions exist that save the program counter to a register and change the register context. 14. Where n = 6, this would then be equivalent to just 3 sequential compare & branch instructions . 15. To return, the subroutine had only to execute an indirect branch instruction ( BR ) through that register. 16. Each path get assigned a copy of the program state at the branch instruction as well as a path constraint. 17. The fixed point unit executes integer instructions, generates addresses in load store operations and some portions of branch instructions . 18. Also as statistically most branch instructions will be taken it makes sense to assume this will always be the case. 19. Branch instructions that cannot be resolved due to INV sources are simply assumed to have had their direction predicted correctly.20. A branch instruction , for example ( unconditional branch to location 345 ) would be encoded as 61 03 45. 