From the time that the processor's instruction decoder has figured out that it has encountered a conditional branch instruction to the time that the deciding register value can be read out, the pipeline needs to be stalled for several cycles, or if it's not and the branch is taken, the pipeline needs to be flushed.
12.
Conditional branch instructions test this encoded as a values from 0 to 15, representing the arithmetic sum of the four condition code values, 2 3 + 2 2 + 2 1 + 2 0 . ( Since IBM uses big-endian bit numbering, mask value 8 selects code 0, mask value 4 selects code 1, mask value 2 selects code 2, and mask value 1 selects code 3 .)
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