This sequence of instructions generates position-independent code because call takes an instruction-pointer-relative immediate operand describing the offset in bytes of the target instruction from the next instruction ( in this case 0 ).
12.
Some of the basic features introduced during this period included index registers ( on the Ferranti Mark 1 ), a return address saving instruction ( UNIVAC I ), immediate operands ( IBM 704 ), and detecting invalid operations ( IBM 650 ).
13.
Other assemblers may use separate opcode mnemonics such as L for " move memory to register ", ST for " move register to memory ", LR for " move register to register ", MVI for " move immediate operand to memory ", etc.
14.
The constraints indicate that a particular RTL pattern might only apply ( for example ) to certain hardware registers, or ( for example ) allow immediate operand offsets of only a limited size ( " e . g . " 12, 16, 24, & bit offsets, etc . ).
15.
Less frequently used instructions are encoded in 32 bits . 32-bit instructions allow 16-or 20-bit immediate operands ( such as far branches ), up to six register operands ( for example long multiply which has four source and two destination operands ) and additional opcode space for rarely used instructions.
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