The NMI service routines first vector through $ FFFA hex / 65530 dec which determines the cause and then transfers control to the interrupt service routine.
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This definition originates from single-threaded programming environments where the flow of control could be interrupted by a hardware interrupt and transferred to an interrupt service routine ( ISR ).
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Hence, interrupt service routines are limited in the actions they can perform; for instance, they are usually restricted from accessing the file system and sometimes even from allocating memory.
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The concept of context assumes significance in the case of interruptible tasks, wherein, upon being interrupted, the processor saves the context and proceeds to serve the interrupt service routine.
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The address of the interrupt service routine ( ISR ) is read from the interrupt vector table and loaded to the IP register, and the ISR is executed as a consequence.
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The interrupt service routine can then run specific display or graphics software to modify data in the video home computers and video game consoles that relied upon a central microprocessor to generate text or graphic displays.
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The first word of the interrupt vector contains the address of the interrupt service routine and the second word the value to be loaded into the PSW ( priority level ) on entry to the service routine.
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Without extra arrangements to protect the return address, Re-entrancy was problematic for the same reason : An interrupt service routine must refrain from calling any subprogram that might have been the code that was interrupted.
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The stored address is called before or after the TSR has received the interrupt and has finished its processing, in effect forming a singly linked list of interrupt handlers, also called " interrupt service routines ", or ISRs.
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For example, a function could be wrapped all around with a mutex ( which avoids problems in multithreading environments ), but if that function is used in an interrupt service routine, it could starve waiting for the first execution to release the mutex.
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