To simultaneously control all processor's features in one cycle, the microinstruction is often wider than 50 bits; e . g ., 128 bits on a 360 / 85 with an emulator feature.
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The chips in the chip set were connected with four buses : the MIB, DAL, PAL and CAL . The MIB ( microinstruction bus ) carried microinstructions control signals and addresses from the control store to the I / E and F chips.
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Microcode can be characterized as " horizontal " or " vertical ", referring primarily to whether each microinstruction controls CPU elements with little or no decoding ( horizontal microcode ) or requires extensive decoding by combinatorial logic before doing so ( vertical microcode ).
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The FP control unit had a hardware network for conditional microinstruction execution, with four mask registers and a condition-hold register; three bits in the microinstruction format select among nearly 50 conditions for determining execution, including result sign and overflow, I / O conditions, and loop control.
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The FP control unit had a hardware network for conditional microinstruction execution, with four mask registers and a condition-hold register; three bits in the microinstruction format select among nearly 50 conditions for determining execution, including result sign and overflow, I / O conditions, and loop control.
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However, this is not the same as the " micro-op fusion ", which aims at the fact that a more complex microinstruction may replace a few simpler microinstructions in certain cases, typically in order to minimize state changes and usage of the queue and reorder buffer space, therefore reducing power consumption.
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