The carry-save unit consists of " n " full adders, each of which computes a single sum and carry bit based solely on the corresponding bits of the three input numbers.
22.
Schematic symbol for a 1-bit full adder with " C " in and " C " out drawn on sides of block to emphasize their use in a multi-bit adder
23.
For instance, in a full adder, the carry output is found by applying a majority function to the three inputs, although frequently this part of the adder is broken down into several simpler logical gates.
24.
With this formulation, each row in the decoder is a set of full adders which reduce the base register, the offset, and the row number to a carry-save format, and a comparator.
25.
We can view a full adder as a " 3 : 2 lossy compressor " : it sums three one-bit inputs and returns the result as a single two-bit number; that is, it maps 8 input values to 4 output values.
26.
Moreover, given " n " adders ( here, " n " = 32 full adders ), the result can be calculated after propagating the inputs through a single adder, since each digit result does not depend on any of the others.
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