The PCLATH register supplies high-order instruction address bits when the 8 bits supplied by a write to the PCL register, or the 11 bits supplied by a GOTO or CALL instruction, is not sufficient to address the available ROM space.
22.
In early computers without any form of modifying the instruction address, which required several additional program steps and used up more computer memory, a scarce resource in computer installations of the early era ( as well as in early microcomputers two decades later ).
23.
This approach is effective if a " LPA-PPA " set registers is reserved for each type of function : one for instruction address, two for data operands ( each instruction can have up to two operand addresses ) and eventually one for data stack.
24.
In the early instances of the architecture ( System / 360 and early System / 370 ), the instruction address was 24 bits; in later instances ( XA / 370 ), the instruction address was 31 bits plus a mode bit ( 24 bit addressing mode if zero; 31 bit addressing mode if one ) for a total of 32 bits.
25.
In the early instances of the architecture ( System / 360 and early System / 370 ), the instruction address was 24 bits; in later instances ( XA / 370 ), the instruction address was 31 bits plus a mode bit ( 24 bit addressing mode if zero; 31 bit addressing mode if one ) for a total of 32 bits.
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