The first three bits of an operand address could designate one of six index registers that occupied the first 32 addressable memory locations.
42.
Thus, register X1 is being used as the index register, and the offset, v, is specified in the second byte of the instruction.
43.
There was also a program counter, four index registers, and a 16-bit real time clock register which was incremented 32 times a second.
44.
When indexing is specified, the register defined in the instruction becomes the index register, and the source / destination is implicitly Register zero.
45.
Typical instructions contain a function code, the target ( or source ) register, an index register, a base register and a displacement field.
46.
Additionally, a third index register ( Z ) was included, the stack pointer was widened to 16 bits, and the direct page addressing mode.
47.
Additionally, several commands that used the index registers had side effects that led to quirky programming, but these were modified to have no side effects.
48.
In most ISRs, the accumulator and / or index registers must be preserved to assure transparency and later restored as the final steps prior to executing.
49.
An instruction word consisted of 11 bits for an address, two bits for index register selection, and 7 bits for the operation code and its modifiers.
50.
There were no index registers, and as addresses were stored in the instructions, loops had to be implemented by modifying the instructions as the program ran.
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