1. The start bit signals the receiver that a new character is coming. 2. The stop bits gave the system time to recover before the next start bit . 3. The stop bits are marking, so as to be distinct from the subsequent start bit . 4. The data frame contains 10 bits : 1 start bit , 8 data bits, 1 stop bit. 5. Such a machine would send 1 start bit , 5 data bits, and 1.42 stop bits. 6. Each byte is transmitted in the sequence " 1 start bit -8 data bits-2 stop bits ". 7. After the start bit and before the eight data bits is another pause of at least 1 / 1800 seconds. 8. The link is based on character asynchronous transmission with 1 start bit and 1, 1.5 or 2 stop bits. 9. The receiver tests the state of the incoming signal on each clock pulse, looking for the beginning of the start bit . 10. The preamble should send V-Hi for three periods then V _ Low for one period then a logic 1 start bit .
